mos_8502

@mos_8502@soc.studio8502.ca

Retrocomputing Maker and Designer in Ontario, Canada. I make stuff without promising a delivery date. I don't do crowdfunding, but I do gratefully accept Patreon and Ko-Fi support for what I do.

I am also a GNUstep contributor.

Language: English (I do speak others, but not well enough to claim fluency of any real kind)

Pronouns: He/Him

Nationality: Canadian

Politics: Hard Left, New Democratic Party, but pragmatic about it

Technology: Retro

This profile is from a federated server and may be incomplete. Browse more on the original instance.

mos_8502, to random

Okay. Big old image heavy thread. There will be no alt text, because alt text that accurately describes schematic diagrams would get real repetitive repetitive real real fast fast. Sorry.

Schematic review, a section at a time. Let's start with the CPU. The W65C265S, clocked at 8MHz. I doubt I got anything wrong here. Capacitors are 1%, 0402 SMDs unless otherwise noted. The CPU for this revision is a PLCC84 (SMD socket) because I have a tube full of the things on my desk.

mos_8502,

Our various active-high/active-low signals get appropriate pull up/down resistors; 0402 SMD again.

mos_8502,

Glue logic is an ATF22LV10C programmable logic device. Cheap and cheerful, even if CUPL sucks so hard as an HDL. The code for this is ~90% written.

mos_8502, to random

When I spend my "fun" budget in January, that's going to include the NEC V20 and Proton PT8010AF chips needed for the Micro8088, but I should probably also order some PCBs for other stuff for that. I know I definitely want a PicoGUS in there, but I'll be needing a floppy controller, an IDE controller, serial and parallel controller, and some kind of video card. I don't have a CGA, EGA, or MDA compatible display, so maybe something like the Graphics Gremlin is appropriate?

mos_8502,

Serial: There's a quad-port ISA card: https://github.com/hkzlab/ISA_QuadUART2

Floppy: Monster FDC supports up to 8 floppy drives(!) https://github.com/skiselev/monster-fdc

4MB EMS memory card: https://github.com/hkzlab/ISA_EMS_4Mb

XT-IDE Deluxe: https://github.com/monotech/XT-IDE-Deluxe

8-bit NE2000 compatible NIC: https://github.com/skiselev/isa8_eth

That would seem to be all the slots filled.

eloquence, (edited ) to threads
@eloquence@social.coop avatar

There's a common false dichotomy about : cut them off, or leave it to user choice.

I can't speak to other software, but Mastodon offers a third option: limiting Threads. This can be done for all users of a server.

  • You can follow Threads accounts after clicking through a warning.

  • You have to manually approve followers from Threads.

Note, however, that boosted posts will continue to appear in your home timeline:

https://github.com/mastodon/mastodon/issues/26301#issuecomment-1868240966

mos_8502,

@eloquence That reeks of half-measures.

jacqueline, to random
@jacqueline@chaos.social avatar

i swing wildly between

"people will understand that it's indie hardware and it's not gonna be the most polished thing in the world"

and

"if there are any bugs then i'm basically a fraud"

mos_8502,

@jacqueline I just want to know where and how much to buy one.

mos_8502, to random

“If you block Threads you don’t care about an open web” has big “blocking me is censorship” energy.

mos_8502,

@jpm

etchedpixels, to random
@etchedpixels@mastodon.social avatar

People are surprised when they find out I am anti-vax, but I'm sorry the Sun3 was just a better machine.

mos_8502,

@etchedpixels Had me in the first half, not gonna lie.

mos_8502, to random

Meta trying to take over the Fediverse reeks of Google trying to moderate the alt.* hierarchy in Usenet. It’s just not practical. I can see why they’d try, but the attempt is doomed.

mos_8502, to random

While yes, Google did not do XMPP any favours, there is a counter example. Usenet wasn't killed by corpo fuckwittery, it was killed by being horrible to people, completely unmoderated, and far too centralized for a supposedly federated network.

The lesson of XMPP is not to trust corpos. The lesson of Usenet is to moderate and curate your fucking communities. If you let fascists and kiddie fiddlers run free, you drive off normal fucking people.

mos_8502, to random

Don't give muskrat any ideas. They'll starve to death.

mos_8502, to random

It is legitimately bugging me that I seem to be the only person who wants to be able to buy an ARM or RISC-V or MIPS or SPARC CPU, implemented with an inexpensive FPGA, with a standard parallel memory bus.

I feel stupid for wanting to be able to take such a thing, stick two or four 8/16 bit wide SRAMS and ROMs on it, and have a play like it was Real Hardware™.

mos_8502, to random

You can, in fact, do DMA through the cartridge port on Sentinel 65X.

Your cartridge needs only pull the BE line low during any period where PHI2 is low -- this will cause the CPU to stop and release the bus until BE is high. You may then use the address and data pins to access whatever you want, except for addresses which select hardware internal to the CPU; the CPU pin which would need to be brought low to write into the CPU is held high by a pullup and not accessible from the cart port.

mos_8502,

The main use of this would be for having your cartridge interface directly with the VERA; you could design a DMA engine which writes blocks of memory thruogh the VERA's data port continiously, much faster than the CPU can do. The implementation of such a DMA chip is left as an exercise for the interested.

mos_8502,

@kkarhan Hypothetically. Keep in mind the CPU is totally stopped (without data loss) while you did such DMA.

mos_8502,

@kkarhan The cartridge port has direct access to the select lines for the system ROM, RAM, and VERA; technically, you could design a cartridge which contains a CPU of another type, stops the main CPU, and takes over completely, SuperCPU style.

mos_8502,

@kkarhan It would be most advisable to do DMA during a period when the CPU is in the WAI (wait for interrupt) idle state; this will ensure no noise from the CPU can possibly end up on the data bus, and the CPU can be woken up with any interrupt being brought low. You can monitor the RUN line to determine when DMA is safe.

mos_8502,

@kkarhan The basic procedure would be to pause all the timers, set the interrupt disable bit, execute a WAI, wait for the RUN line to go low, and then do your DMA until RUN goes high, tripping an IRQ (which will be ignored except for waking up the CPU) when you're done.

mos_8502,

@kkarhan There should probably be a kernel function to do this.

mos_8502,

@kkarhan If you wanted to take over completely, you could make the CPU execute a STP instruction, which shuts the CPU down completely until /RES goes low. Best be ready to be in charge if you're going to do that -- I'm not sure whether or not the PHI2 output on the CPU keeps chugging when STP has stopped the CPU.

mos_8502, to random

I'm not saying Threads doesn't have the right to federate. They have every right. Open protocols are open, film at eleven.

I am saying that nobody should ever rely on a corpo fuckwit like Meta for anything important. Block them, don't block them, defederate or don't, that's your own lookout, it's not my problem. But don't ever recommend a corporate option over the many great independent Fediverse options.

mos_8502, to random
mos_8502, to random

The usual AliExpress stores carry a multicoloured array of Mega Drive type cartridge shells in various cheap plastics, for very cheap.

Yet another reason why I'm sticking with that cartridge type.

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