azonenberg

azonenberg, 4 days ago

@foone I would love a laptop with dual mode PoE that can either power peripherals from the laptop, or charge the laptop.

azonenberg, 5 days ago

@aud new optimization technique: eval( <2 MB obfuscated minified one-liner> )

azonenberg, 5 days ago

@felix In my case, I was building a robust log-structured data store that needed to be able to recover from flash memory corruption caused by the device losing power or being reset in the middle of a flash write.

The problem is, this particular MCU has ECC flash and will return a bus fault (rather than garbage data) if you get an uncorrectable error.

So in order to verify the contents of a flash object before allowing the application to use it, I need to verify the CRC and ECC with faults turned off, then return either null or a pointer to the valid data.

The alternative would have been to let it hard fault, figure out why if it did, and try to recover afterwards, but this seemed like the better option keeping the fault handling logic local to the code that handled the possibly-tainted flash sectors.

azonenberg, 5 days ago

@felix DMA for the CRC32 would be doable but I'm not sure what happens to the CPU if a DMA has a bus fault. I've never tried or read the appropriate part of the datasheet.

That said, I'd still need to be able to recover from other faults like corrupted metadata regions in the flash, and DMA for reading the object log makes little sense.

azonenberg, 5 days ago

New horrible idea: use some combination of RAII wrappers and macros to make a "unsafe" block for C++ that disables and re-enables data faults within the active scope.

{
unsafe
//do stuff that might segfault here
}

azonenberg, 5 days ago (edited 4 days ago)

class FaultDisabler
{
public:
FaultDisabler() { sr = SCB_DisableDataFaults(); }
~FaultDisabler() { SCB_EnableDataFaults(sr);}
protected:
uint32_t sr;
};

#define unsafe FaultDisabler fd;

azonenberg, 5 days ago

@whitequark is this sufficiently cursed to earn your eldritch horror seal of approval?

azonenberg, 5 days ago

@whitequark I meant more the "i wrote code so memory unsafe i needed to add the unsafe keyword to c++ for it to work"

azonenberg, 5 days ago

@whitequark Yeah I'm only accessing valid memory locations. I just sometimes get a PSLVERR or whatever the AXI equivalent is in return.

azonenberg, 4 days ago

@whitequark Testing it out, seems to do what I wanted so far...

azonenberg, 4 days ago

@Xilokar @felix STM32L4 and H7 are the near term platforms. But probably a lot of other newer STM32s too.

azonenberg, 4 days ago

@Xilokar @felix Yeah I actually am building a power-loss fuzzer for validating this code more extensively. Basically two STM32's with one controlling reset and a load switch to the second.

DUT will be reading and writing flash in a loop and checking that all transactions atomically succeed or fail and there's no segfaults.

azonenberg, 4 days ago

@Xilokar @felix It's 10K for these parts and that's one of the reasons microkvs is a log structured FS (many object writes -> one flash P/E cycle).

That said, the power loss fuzzer board is something I intend to test to destruction to check, among other things, how it fails in the case of media wear-out.

But the STM32L431 is 2 kB per flash erase block and I have 128 erase blocks, I think, to work with.

So i can test a 2-block KVS to destruction then repeat another test regimen at a different flash block and get a lot of testing done before I completely fry the chip.

At which point I can hot air it off (just a 32qfn) and put on another if the situation dictates. And the worn out one will become microscope food.

azonenberg, 4 days ago

@Xilokar @felix ECC block size is 8 bytes (STM32L431) and 32 bytes (STM32H735) for my two main MCUs of interest.

MicroKVS is a log structured design that ping-pongs two flash blocks, appending data objects to one block (metadata storage in the start of the block then object content in the rest) until it's full, then moving the latest version of each object to the second block and erasing the first.

It's the smallest, simplest design you can get while still having power loss protection (i.e. you need a minimum of two erase blocks).

azonenberg, 4 days ago

@nolanl I actually made two versions. The newer one declares it in an "if" scope: if(FaultDisabler fd; 1)

azonenberg, 4 days ago

@nolanl Which looks more like the Rust version, or the general c++ control flow.

The old version, if you look carefully, had the "unsafe" as the first line inside the curly braces and not used as a control statement.

azonenberg, 5 days ago

@gsuberland Just gonna leave that crop circle there for the locals to wonder about?

azonenberg, 6 days ago

@niconiconi Others think "No, I'll use a serial interface".

Now they have a D16.2 D18.3 D15.3 D2.3 D12.3 D5.3 D13.3

azonenberg, 5 days ago

@foone (Blendtec guy voice)

Will it keyboard? That is the question.

azonenberg, 6 days ago

@aeva I read this as "for new reindeer" and was wondering what kind of arctic/Christmas themed game you were working on.

azonenberg, 4 days ago

@tnt @dsvf I have no idea about PHY or PLL analog design but will gladly help with RTL for line coding, gearboxing, 8b10b or 64b66b block sync, etc.

Are you building a transmitter too?

azonenberg, 6 days ago

Speaking of new feature development, here we go! First light on the CDR logic analyzer features, capturing a 10Gbase-R Ethernet frame via the front panel SERDES ports.

This is a quick and dirty test with a lot of manual processing, waveform dumped to CSV then imported, the trigger is hard coded (64/66b data frame at the midpoint of the 512K point capture), etc.

But it validates the acquisition subsystem on the FPGA so now I can start working on building out the scopehal-side driver for this (I have no idea how the API is going to handle something that's simultaneously a scope and a BERT and more, there's a bunch of refactoring needed to handle this sort of thing...)

azonenberg, 6 days ago

Ok yeah a bunch of long overdue yaks in libscopehal are going to need to get shaved to implement this.

(rolls up sleeves and plugs in electric shears)