New horrible idea: use some combination of RAII wrappers and macros to make a "unsafe" block for C++ that disables and re-enables data faults within the active scope.
@Xilokar@felix Yeah I actually am building a power-loss fuzzer for validating this code more extensively. Basically two STM32's with one controlling reset and a load switch to the second.
DUT will be reading and writing flash in a loop and checking that all transactions atomically succeed or fail and there's no segfaults.
@Xilokar@felix It's 10K for these parts and that's one of the reasons microkvs is a log structured FS (many object writes -> one flash P/E cycle).
That said, the power loss fuzzer board is something I intend to test to destruction to check, among other things, how it fails in the case of media wear-out.
But the STM32L431 is 2 kB per flash erase block and I have 128 erase blocks, I think, to work with.
So i can test a 2-block KVS to destruction then repeat another test regimen at a different flash block and get a lot of testing done before I completely fry the chip.
At which point I can hot air it off (just a 32qfn) and put on another if the situation dictates. And the worn out one will become microscope food.
@Xilokar@felix ECC block size is 8 bytes (STM32L431) and 32 bytes (STM32H735) for my two main MCUs of interest.
MicroKVS is a log structured design that ping-pongs two flash blocks, appending data objects to one block (metadata storage in the start of the block then object content in the rest) until it's full, then moving the latest version of each object to the second block and erasing the first.
It's the smallest, simplest design you can get while still having power loss protection (i.e. you need a minimum of two erase blocks).
Finally taped-out a personal project on #TinyTapeout 🎉
This is a differential receiver that should hopefully work up to 500 MBps. ATM it doesn't have any CDR or anything, it just takes clk/data pair and gearbox down 1:16 ... Having some CDR is next 😅