X31Andy, to random
@X31Andy@mastodon.green avatar

RISC-V implementation flaws.

Interesting bit of research testing the behaviour of RISC-V CPUs with improper code (fuzzing).

Lots of implementation issues found. Guess it is better to find it now than later. Guess it isn't such an issue with embedded devices running static firmware but could be bad with bigger systems.

https://www.theregister.com/2023/10/24/cascade_fuzzer_zurich/

#cpu #riscv

ProjectPhysX, to GraphicsProgramming

v2.17 is out! Some huge /​ hardware has been announced at , so I've made my code ready. Until now I've been using 32-bit indexing, which overflows for >2³² grid cells in a domain, equivalent to 225 GB VRAM. Now my code will at runtime automatically compile with 64-bit indexing when more cells are used. 🖖🧐
Also, I've added a new raytracing-based field visualization. Thank you @python for the idea! 💡
Release notes 👉 https://github.com/ProjectPhysX/FluidX3D/releases/tag/v2.17

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